SPI Hardware Abstraction Layer for PIC24FJ256GA110

Collaboration diagram for SPI Hardware Abstraction Layer for PIC24FJ256GA110:

Data Structures
struct	hal_spi_settings_t
	spi settings structure More...

Macros
#define	SPI_1   1
	index for SPI module 1 More...
#define	SPI_2   2
	index for SPI module 2 More...
#define	SPI_3   3
	index for SPI module 3 More...

Detailed Description

Author

Michael Muhlbaier

SPI channels 1, 2, and 3 available and supported.

Warning

Only 8-bit mode supported

the PIC24FJ256GA110 does not support all bit_rate settings. It has two prescale dividers: Primary -> 1:1, 4:1, 16:1, 64:1 Secondary -> 1:1, 2:1, 3:1, 4:1, 5:1, 6:1, 7:1, 8:1 Thus the minimum bit_rate is PERIPHERAL_CLOCK / 512 and the max is PERIPHERAL_CLOCK and other values will be rounded down to the nearest divider settings.

Macro Definition Documentation

#define SPI_1   1

index for SPI module 1

#define SPI_2   2

index for SPI module 2

#define SPI_3   3

index for SPI module 3